WELCOME!!

Engr. Jay S. Villan, M. Eng.

Circuits 1 Professor

Nodal Analysis

You have now learned about the laws pertaining to the basic circuit. As you dwell with more schematic figures of the various circuits, you are not just going to identify or calculate easily the voltage, current, power etc.

You will be dealing with more elements, more branches, more nodes, more loops and more brain-breaking problems. But all of these may be lessen turmoil may be lighten if you have understood very well the concepts of the Ohm’s Law and Kirchoff’s Current and Voltage laws(KCL and KVL) from the previous entries prior to this one.

Expected that you are now prepared to apply these laws to develop two powerful techniques for circuit analysis namely:
Nodal Analysis which is based on a systematic application of Kirchoff’s Current Law (KCL) and
Mesh Analysis which is based on a systematic application of Kirchoff’s Voltage Law (KVL). These two techniques are too significant and the students must not miss to dig deeper. Therefore, students are encouraged to pay much careful attention to this topic.
First analysis to be tackled is the Nodal Analysis.

NODAL ANALYSIS WITHOUT VOLTAGE SOURCE

This analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. It is more convenient to choose node voltages instead of element voltages and  it reduces the number of equations that must solve simultaneously. MAKES YOU NOT TOO CRAZY!!!

In nodal analysis, we are interested in finding the node voltages. Given a circuit with n nodes without voltage sources, here are the steps to take to determine Node Voltages.

1.  Select a node as the reference node. Assign voltages v_1, v_2, … v_n-1, to the remaining n-1 nodes. The voltages are referenced with respect to the reference node.
2.  Apply KCL to each of the n-1 nonreference nodes. Use Ohm’s law to express the branch currents in terms of node voltages. (It is n-1 because you have to subtract 1 which refers to the reference node which has zero V already. So you just have to focus for the remaining nodes)
3. Solve the resulting simultaneous equations to obtain the unknown node voltages.

The number of nonreference nodes is equal to the number of independent equations that you will derive.

Let us now talk furthermore about each step.

ON FIRST STEP:
Selecting reference Node or datum node is the first step in this analysis. The reference node is commonly called the ground and it is assumed to have a zero voltage. Commonly, we use the earth ground (a) or (b).

Keep in mind that Node 0 is reference node(v=0), while nodes 1 and 2 are assigned voltages v₁ and v_2. Always bear that node voltages are defined with respect to the reference node.


ON SECOND STEP:

Apply KCL to each nonreference node in the circuit. We advised you to redraw the circuits and put labels on each node with current and voltage labels. This is to avoid putting too much information on the same circuits and this will ease your CRAZINESS!!!

After this, sum up all currents i_1, i_2, i₃ through their corresponding resistors R_1, R_2, R_3,respectively.

At node 1, applying KCL gives     I­₁=I₂+i₁ + i₂

At node 2,    I­₁+I₂ = i₃

We can now apply Ohm’s Law to express the unknown currents i₁, i₂ and i₃  in terms of nodes voltages.

The key idea to bear in mind is that, since resistance is a passive element, by passive sign convention, current must always flow from a higher potential to a lower potential.
*Current flows from a higher potential to a lower potential in a resistor.

To be precised, this principle is set to be

I= v_higher - v_lower
                R

1. i₁= v₁ – 0

                  R₁

1. i₂= v₁ – v₂

                    R₂

1. I₃= v₂ – 0

                   R₃

Substitute all of the equations a, b, and c to the equations of node 1 and node 2.

After that, you have to simplify for you to take it easy for using Cramer’s Rule. (You are probably 3^rd year or 4^th year now, so we expect you to have knowledge about Cramer’s Rule)

Get the determinant first of the matrix coming from the equations on node 1 and node 2. (delta)

After getting the determinant, divide the delta₁ from the delta. So as for the delta₂ to get the v₁ and v_2.

---

---

NODAL ANALYSIS WITH VOLTAGE SOURCE

Let's consider that the voltage can affect the nodal analysis. Using this circuit, we can have two possibilities.

CASE 1
If a voltage source is connected between the reference node and a nonreference node, we simple set the voltage at the nonreference node equal to the voltage of the voltage source. In the figure, for example,

V₁= 10 V
Thus , our analysis is somewhat simplified by this knowledge of the voltage at this node.

CASE 2
If the voltage source(dependent or independent) is connected between two nonreference nodes form a generalized node or supernode, we both now apply KCL and KVL to determine the node voltages.
where a  supernode is  formed by enclosing a (dependent or independent) voltage source connected between two nonreference nodes and any elements connected in parallel with it.

In this figure, nodes 2 and 3 form a supernode. We analyze a circuits with supernodes using the same three steps from behind but supernodes are just treated the other way on this matter. This is because KCL is essential component of nodal analysis which required knowing the current through each element. But there’s no way to know the current through a voltage source ahead. So, KCL must be satisfied at a supernode.
i₁ + i₄= i₂ + i₃

But how can you fill the i’s?

Remember the    I= v_higher - v_lower      
                                                         R
You may apply it here. So,
v₁ – v₂   +   v₁ – v₂    =   v₂ – 0  +   v₃ –0   
   4                  2                 8             6
           
 To apply Kirchoff’s voltage law to the supernode in the figure, we redraw the circuits and make a loop in clockwise direction. This will give you
-v₂   + 5 + v₃  =   0     to  v₂  ­- v₃  =  5  

We now obtain the node voltages. Note the following properties of a supernode:

1. The voltage source inside the supernode provides constraint equation needed to solve for the node voltages.
2. A supernode has no voltage of its own.
3. A supernode requires the application of both KCL and KVL.

Example:

      

---

---

LEARNING/SUMMARY

• Here we go now this one of the complicated topics that we have encountered. We do not want you to suffer like how we had it. You are now dealing with your confused mind. The best tip we can offer is to really familiarize all the topics prior to this one because this is also one of the applications of the basics.

• Maybe at first you get a hard time, but practicing exercises are very useful.

Wye-Delta Transformation

Wye-Delta Transformation

One of the most confusing factors in circuit analysis is the resistors. Instances are often introduced in circuit analysis when you find a hard time in determining if the resistors are connected in series or parallel. 

Fig. 2.1

As you can see, there's a bridge circuit in Fig 2.1. How are you going to combine
R₁ through R₆  when the resistors are neither in series nor parallel?

This problem can be simplified by using three-terminal equivalent networks. These are the wye(Y) or tee(T) network  shown in Figure 2.2 and the delta(∆) or pi (Π) shown in Figure 2.3. These networks occur by themselves as part of a larger network.



Figure 2.2 
(a) Y , (b) T 


Figure 2.3
(a) ∆ , (b) Π

Our main goal here is how to identify them when they occur as part of the network and how to apply wye-delta transformation or vice-versa to analyze the given network.

DELTA to WYE TRANSFORMATION

If a circuit contains a delta (∆,Π) configuration, it is more convenient to work with wye network. In short, transform it to Wye(Y)  to find its equivalent resistance.
In layman’s term, so that you can easily remember Delta to Wye conversion, the word “Wye”  always implies a number just like in algebra. And the resistor values are given already labeled as, R_a, R_b, R_c . Therefore, since you are to transform it to wye, the equivalent to be looked for is R_1, R_2, R₃ .

In this case, let n be the number of resistor to be looked for as you transform delta to wye network.

The formula will be R_n= the value of the resistors on the two  adjacent sides
                                                       Summation of all the resistors given

It does not follow a direction or a pattern. What you have to remember is our layman’s general formula for this conversion since we have noticed that it is only applicable for delta to wye conversion.

 Example: 
 Use Figures 2.2 and 2.3.


Transformation looks like this.

---

---

WYE to DELTA TRANSFORMATION

If a circuit contains a Y (Y, T) configuration, it is more convenient to work with delta network. In short, transform it to Delta (∆) network to find its equivalent resistance.
In layman’s term, so that you can easily remember Wye to Delta conversion, the word “Delta” gives you clue that the resistor to be solve is letters namely R_a, R_b, R_c . And the resistor values are given already labeled as, R_1, R_2, R₃ . This is opposite from the first conversion method(Delta to Wye).

 Therefore, since you are to transform it to delta, the equivalent to be looked for is R_a, R_b, R_c .

In this case, let n be the letter of resistor to be looked for as you transform wye to delta network.

The formula will be R_n= the summation of the products of two resistors in order

                                                                        the opposite given Y resistor

The numerator in the formula gives you a pattern where the products of (R₁ xR₂)_, (R₂ xR₃), and (R₃ xR₁) are summed up. What you have to remember is our layman’s general formula for this conversion since we have noticed that it is applicable for wye to delta conversion.

OR

R_n= (R₁ xR₂)+(R₂ xR₃)+(R₃ xR₁)

                  R_opposite of R_n

---

---

---

LEARNING/SUMMARY

• That in making the transformation, you do not take anything out of the circuit or put anything new. You are merely  substituting different but mathematically equivalent three-terminal network patterns to create a circuit in which resistors are either in series or in parallel, allowing you to calculate R_eq if necessary.

• We, the bloggers, we also had and even having a hard time in transforming a complicated circuit since there is a lot of elements involved. So, as we advice, in redrawing circuits, observe first and choose the proper transformation as we have provided figures above as you guide.

Series and Parallel Resistors (Voltage and Current Division)

Review: Spotting Series and Parallel combinations

Series Resistors ⇒ same current flowing through them.

⇒ 1 path

The resistors in series could look like a V (a). They could look like an L (b). They could look like a stepwise function (c). It doesn’t matter what it looks like; if the resistors are connected at one end, it is in series.

Series Resistors & Voltage Division

• v1= iR1 & v2 = iR2

KVL:

• v-v1-v2=0
• v= i(R1+R2)
• i = v/(R1+R2 ) =v/Req
• or v= i(R1+R2 ) =iReq
• iReq = R1+R2

VOLTAGE DIVISION FORMULA

Before:

v1 = iR1   &   v2 = iR2
i = v/(R1+R2 )
Thus:

v1=vR1/(R1+R2)

v2=vR2/(R1+R2)

To solve for Req:
Req = R1+R2 ...

---

---

Parallel Resistors & Current Division

Parallel Combinations
Now it gets a bit trickier. Are the resistor leads connected at two ends? Sometimes it’s very easy to see, like these nice block-y circuits.

Sometimes, though, you get things that look like this.

When this is the case, shorten the wires.

Do the resistors end up side-by-side and connected at both ends? Then they are connected in parallel, with the current being split between the junctions that are in parallel.
For more info. visit: https://craftsandcircuits.wordpress.com/2014/06/19/visualizing-circuit-analysis-with-gifs/

---

 

Parallel Resistors ⇒ common voltage across it.

⇒ Still equal

• v = i1R1 = i2R2
• i   = i1+ i2

= v/R1+ v/R2
= v(1/R1+1/R2)
=v/Req

• v  =iReq
• 1/Req = 1/R1+1/R2
• Req = R1R2 / (R1+R2 )

CURRENT DIVISION FORMULA

Before:

v = i1R1 = i2R2
v=iReq = iR1R2 / (R1+R2 )
and i1 = v /R1  &  i2 =v/ R2

Thus:

i1= iR2/(R1+R2)

i2= iR1/(R1+R2 )

To solve for Req:
Req = 1/R1+  1/R2 ...  1/Rn

---

---

Conductance (G)

Series conductance:

1/Geq = 1/G1 +1/G2+…

Parallel conductance:

Geq = G1 +G2+…

---

---

Now putting all this together…
Remember, orientation does not matter. We’ve been conditioned by nice, predictable circuit diagrams to think of series and parallel circuits in very limited forms, be it as a straight line or as a block-y succession of resistors. However, this will clearly not be the case all the time.
What we should appreciate is the basics. Connected on one end, series. Two ends, parallel. Resistor leads touching, short circuit. Because no matter what the complexity of the circuit is, these simple rules work every time.
Going back to the nasty circuit in the beginning…
(Assume that all unmarked resistors are 1 ohm.)

Source: https://craftsandcircuits.wordpress.com/2014/06/19/visualizing-circuit-analysis-with-gifs/

---

---

LEARNING/SUMMARY

• In series circuits, you SHOULD use voltage division to find the desired unknowns.

• In parallel circuits, you SHOULD use current division to find the desired unknown.

• If the circuit is complicated, always be conscious and observe your steps when you are minimizing your circuit without disobeying the rules of parallel and series circuits.

• ALWAYS BE AWARE AND DO NOT HASSLE YOURSELF.

Nodes, Branches & Loops

• Elements of electric circuits can be interconnected in several way.
• Need to understand some basic concepts of network topology.
  • Branch(es)⇒ Represents a single element. (ex: voltage,resistor & etc.)
  • Node(s)⇒ Meeting point between the two or more branches.
  • loop(s)⇒ Any closed path in a circuit.

---

example(1):

• How many branches and nodes for the following circuit?

Answer: There were 5 branches and 3 nodes.

example(2):

There were:

5 branches

• 1 voltage source
• 1 current source
• 3 resistors

3 nodes

• a
• b
• c

example(3):

• How many branches, nodes and loops for the following circuit?

Answer: There were 7 branches, 4 nodes, and 10 loops.

---

Kirchhoff's Current Law (KCL)

• The algebraic sum of current entering/leaving a node (or closed boundary) is zero.
• current enters- positive (+)
• current leaves- negative (-)
• ∑ current entering = ∑ current leaving

example KCL(1):

• Given the following circuit, write the equation for currents.

example KCL(2):

• Current in a close boundary.

example KCL(3):

• Use KCL to obtain currents i1, i2, and i3 in the circuits.

Answer:

A= 1A+i1=2A+10A

i1=12A-1A

i1=11A

B= 3A+2A=1A+i2

5A=1A+i2

i2=4A

C= i3+10A=11A

i3=11A-10A

i3=1A

---

Take note:

Series=add up voltage

Parallel=equal voltage

Kirchhoff's Voltage Law (KVL)

• Applied to a loop in a circuit.
• According to KVL→ The algebraic sum of voltage (rises or drops) in a loop is zero.

From positive → negative

+Vs-V1-V2-V3=0

 

example KVL(1):

• Use KVL to obtain v1, v2 and v3.

Answer:

+20+25-10-v1=0

V1=35v

+10-15+v2=0

v2=-10+15

v2=5V

+v1-5-v3=0

35-5-v3=0

v3=30V

example KVL(2):

• Use KVL to obtain v1 and v2.

Answer:

+10v+12v+6v-v1-v1=0

28v-2V1=0

28V/2=2V1/2

V1= 14V

+V2-12V-10V=0

+12V-22V=0

V2= 22V

example KVL(3):

• Calculate power dissipated in 5Ω resistor.

Answer:

P= iv = i²R = v²/ R

V 5Ω = 5i

45-10i + 3vo – 5i =0

vo = 10i

45-Vo + 3vo -5i = 0

i = Vo/10

45-Vo +3vo -5 (Vo/10) = 0

---

---

LEARNING/SUMMARY

• In determining the nodes, always look for the intersection or cross section of two elements.
• Branches are also called as element. So, do not get to far and do not make hard on yourself.
• Loops are any closed path in a circuit.

• At our first encounter, we had suffered like a chaos in our mind. But this is what we tell you, our learners, always circle round in clockwise and use the sign upon exit. This is applicable KVL. But you can choose counterclockwise as well. But you know, just like the clock, it goes from left to right the reason why you read the clock rightly.

• We also advice you take layman's term for yourselves but make sure you have understood the fundamental concepts behind each thing. Just like in KCL, positive is equals to negative; where enters to you life, you will be positive. And so as if people leave you behind, you will be negative already.  But you will still be equal in a way that people may leave you but there are people who will come to you.